Senior Chip Verification Engineer

Job description

As a Senior Chip Verification Engineer, you will have the unique opportunity to work closely with cross-functional teams to execute SoC verification tasks, develop innovative test cases and test bench solutions, and integrate 3rd party VIP components. You will be responsible for ensuring compliance with relevant functional and safety-related requirements, all while working alongside a passionate group of professionals who are committed to advancing SoC verification topics.

• Execute SoC verification tasks working closely with team members to review and understand the relevant functional and safety-related requirements;
• Work and align with different stakeholders to identify verification plans and define SOC verification strategies;
• Execute the verification plan by developing C/C++ test cases and System Verilog/UVM Test Bench components and by integrating 3rd party VIP Components.

Required skills

• Master’s or bachelor’s degree in Electrical/Electronic Engineering;
• At least 3 years of experience in a Verification role, either at IP or SoC level;
• Knowledge of tools like Xcelium, Spectre(X) and Simvision;
• Strong foundational knowledge of digital/mixed-signal design & verification;
• Knowledge and hands-on experience of System Verilog and UVM;
• Exposure to version-controlling (e.g. Git/Bitbucket, Clear Case, CVS, SVN) and bug-management schemes;
• Fluency in English.

It is an advantage if you also have:

• Hands-on experience in hardware-software debugging at the system or application level;
• Hands-on experience in gate-level-simulations and with debugging/troubleshooting;
• Understanding of UPF context of analog/transistor level;
• Basic analog knowledge for debugging purposes;
• Experience in the automotive industry in Functional Safety ISO26262 and Cybersecurity ISO21434.